[TYPES/announce] Call for Papers: MARTES'06 - Modeling and Analysis of Real-Time and Embedded Systems

[Susanne Graf]

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   *                              MARTES                                  *
   * Workshop on Modeling and Analysis of Real-Time and Embedded Systems  *
   *                        October 2 or 3, 2006                          *
   *                           Genova, Italy                              *
   *                       http://www.martes.org                          *
   *                                                                      *
   *          Workshop held in conjunction with MoDELS/UML 2006           *
   *                   http://www.umlconference.org/                      *
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                    Submission deadline: August 30, 2006
                    -------------------------------------

The Model Driven Architecture (MDA) initiative of the OMG puts forward the idea 
that future process development will be centered around models, thus keeping 
application development and underlying platform technology as separate as 
possible. The aspects influenced by the underlying platform technology concern 
mainly non functional aspects and communication primitives.

The first significant result of the MDA paradigm for engineers is the 
possibility of building application models that can be conveniently ported to 
new, emerging technologies - implementation languages, middleware, etc.- with 
minimal effort and risk in one hand, but also that can be analyzed either 
directly or through a model transformation toward a specific formal 
technological space in order to validate or/and verify real-time properties such 
as for example schedulability.

In the area of DRES (distributed, Real-time and Embedded Systems), this 
model-oriented trend is also very active and promising. But DRES are different 
from general-purpose systems. The purpose of this workshop is to serve as an 
opportunity to gather researchers and industrials in order to survey some 
existing experiments related to modeling and model-based analysis of DRES.

Moreover in order to be able to exchange models with the aim to apply formal 
validation tools and to achieve interoperability, it is important to have also a 
common understanding of the semantics of the given notations. Other important 
issues in the domain of real-time are methodology and modeling paradigms 
allowing breaking down the complexity, and tools which are able to verify well 
designed systems.

The MARTES workshop is a merge of two series of complementary workshops that 
were dedicated to RT/E systems and UML and which had both taken place, amongst 
others, as workshops associated with the UML conferences, the predecessor of 
MODELS: SIVOES and SVERTS.

Topics:
======
- Modeling RT/E using modelling languages such as UML
     o How to specify real-time requirements and characteristics
     o How to enhance modelling languages to capture real time, embedded
       and distributed aspects in a convenient manner
     o Declarative versus operational real-time specifications
     o Notations for defining the architecture of heterogeneous systems
     o Behavior modeling
     o RT/E platforms modeling, integration of scheduling aspects
- Semantic aspects of real-time in modelling languages
     o Formal semantics, in particular, semantic integration of
       heterogeneous systems
     o Interpretations of annotations
     o Executability of models
- Methods and tools for analysis of RT systems and components
     o Ensure consistency of timing constraints throughout the system
     o Validation of time and scheduling related properties
     o Validation of functional properties of time dependent systems

Workshop Format
===============
This full-day workshop will consist of an introduction of the topic by
the workshop organizers, an invited presentation (to be determined),
presentations of accepted papers, and in depth discussion of previously
identified subjects emerging from the submissions. A summary of the
discussions will be made available.

Submission and Publication
==========================
To contribute, please send a position paper or a technical paper to
Susanne.Graf at imag.fr or Sebastien.Gerard at cea.fr. Position papers should
not exceed 5 pages, and technical papers 20 pages. Preferably, submissions 
should be in postscript or pdf format.

Workshop proceedings will be distributed to all participants and made
available through the workshop website.

The two best papers and a workshop overview are likely to be published in the 
MoDELS 2005 Satellite Post-Proceedings (as a volume of the LNCS series).

Additionally, a selection will be considered for publication in a
suitable technical journal following an agreement with an interested
publisher (a selection of the SVERTS 2003 papers has recently appeared as a 
special section of Springer's STTT journal).

IMPORTANT DATES
===============
Submission deadline:                                    August 30, 2006
Notification of acceptance:                           September 9, 2006
Final versions due:                                  September 29, 2006
Workshop date :                                    October 2 or 3, 2006


Organizers
==========
Sébastien Gérard - CEA-LIST, France
Susanne Graf - Verimag, France
Øystein Haugen - University of Oslo, Norway
Iulian Ober - Verimag, France
Bran Selic  - IBM, Canada

Programme Committee:(to be finalised)
Daniel Amyot (U. of Ottawa, Canada)
Jean-Philippe Babau (INSA Lyon, France)
Heiko Doerr (Daimler Chrysler, Germany)
Peter Feiler (CMU, Software Institute, US)
Eran Gery (I-Logix)
Sebastien Gerard (CEA-LIST, France)
Holger Giese (Univ. of Paderborn, Germany)
Susanne Graf (Verimag, France)
Øystein Haugen (Univ. of Oslo, Norway)
Jozef Hooman (Embedded Systems Institute & Univ. of Nijmegen, NL)
Bengt Jonsson (Uppsala, Sweden)
Iulian Ober (ISYCOM, U. Toulouse, France)
Dorina Petriu (Carleton U., Canada)
Alan Moore (Artisan)
Bran Selic (IBM, Canada)
Richard Sanders (Sintef, Norway)
Thomas Weigert (Motorola, Chicago)

-- 
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Susanne Graf          | tel : (+33) (0)4 56 52 03 52
VERIMAG               | fax : (+33) (0)4 56 52 03 44
2, avenue de Vignate  | http://www-verimag.imag.fr/~graf/
F - 38610 Gieres      | e-mail: Susanne.Graf at imag.fr
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