[TYPES/announce] Call for participation: ACM SIGPLAN/SIGBED Conference on Languages, Compilers, and Tools for Embedded Systems (LCTES'09)

Alain Girault alain.girault at inria.fr
Fri Apr 10 15:20:08 EDT 2009


			      LCTES 2009

	     ACM SIGPLAN/SIGBED Conference on Languages,
	      Compilers, and Tools for Embedded Systems

		   (In conjunction with PLDI 2009)

		   Dublin, Ireland, June 19~20 2009
		   http://www.cse.psu.edu/lctes09/

Call for participation:
=======================

As embedded systems increase in number, complexity, and diversity, new
research challenges are encountered in areas such as verification,
validation, meeting performance goals and resource constraints,
creating and exploiting new hardware architectures, and scaling up to
multicores and distributed systems built from multicores. The
LCTES 2009 technical programme features papers presenting original
work on programming languages, compilers, tools, and architectures
that help meet these challenges.

Registration:
=============

  - Early registration deadline: May 20, 2009.

  - Registration is through the PLDI web server:
    https://regmaster3.com/conf/PLDI09/register.php

Invited speakers:
=================

  - Edward Lee, UC Berkeley

  - Famantanantsoa Randimbivololona, Airbus

List of accepted papers:
========================

Modulo Scheduling without Overlapped Lifetimes
o Eric Stotzer and Ernst Leiss

Synchronous Objects with Scheduling Policies, Introducing safe shared
memory in Lustre
o Paul Caspi, Jean-louis Colaço, Léonard Gérard, Marc Pouzet and Pascal 
Raymond

Recurrence Cycle Aware Modulo Scheduling for Coarse-Grained
Reconfigurable Architectures
o Taewook Oh, Bernhard Egger, Hyunchul Park and Scott Mahlke

PTIDES on Flexible Task Graph: Real-Time Embedded System Building
from Theory to Practice
o Jia Zou, Joshua Auerbach, David F. Bacon and Edward A. Lee Lunch

A Compiler Optimization to Reduce Soft Errors in Register Files
o Jongeun Lee and Aviral Shrivastava

Raced Profiles: Efficient Selection of Competing Compiler Optimizations
o Hugh Leather, Michael O'Boyle and Bruce Warton

Eliminating the Call Stack to Save RAM
o Xuejun Yang, Nathan Cooprider and John Regehr

Live-range Unsplitting for Faster Optimal Coalescing
o Sandrine Blazy and Benoît Robillard

Push-Assisted Migration of Real-Time Tasks in Multi-Core Processors
o Abhik Sarkar, Frank Mueller, Harini Ramaprasad and Sibin Mohan

Software Transactional Memory for Multicore Embedded Systems
o Jennifer Mankin and David Kaeli

Synergistic Execution of Stream Programs on Multicores with
Accelerators
o Abhishek Udupa, R. Govindarajan and Matthew J. Thazhuthaveetil

Towards device emulation code generation
o Thomas Heinz and Reinhard Wilhelm

Guaranteeing Instruction Fetch Behavior with a Lookahead Instruction
Fetch Engine (LIFE)
o Stephen Hines, Yuval Peress, Peter Gavin, David Whalley and Gary Tyson

Debugging FPGA-based Packet Processing Systems through Transaction-level
Communication-centric Monitoring
o Paul McKechnie, Michaela Blott and Wim Vanderbauwhede

Tracing Interrupts in Embedded Software
o Giovani Gracioli and Sebastian Fischmeister

Addressing the Challenges of DBT for the ARM Architecture
o Ryan W. Moore, Jose A. Baiocchi, Bruce R. Childers, Jack W. Davidson
and Jason D. Hiser

Integrating Hardware and Software Information Flow Analyses
o Colin Fidge and Diane Corney

Specification and Verification of Time Requirements with CCSL
and Esterel
o Charles André and Frédéric Mallet


-- 
-------------
Alain GIRAULT                       http://pop-art.inrialpes.fr/~girault
INRIA senior researcher             tel: +(33|0) 476 61 53 51
Head of the POP ART project-team    fax: +(33|0) 476 61 52 52
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