[TYPES/announce] Constraints in Formal Verification (CFV2015) Call for Participation: Austin, TX, USA

Rozier, Kristin Yvonne (rozierky) rozierky at uc.edu
Tue Sep 1 05:31:33 EDT 2015


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 The Ninth International Workshop on Constraints in Formal Verification
                                CFV'15

               http://iccad.com/event_details?id=196-51-

           5 November 2015        /        Austin, Texas, USA
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Overview:
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Formal verification is of crucial significance in the development of hardware and software systems. In the last decade, tremendous progress was made in both the speed and capacity of constraint technology. Most notably, Boolean Satisfiability (SAT) solvers have become orders of magnitude faster and capable of handling problems that are orders of magnitude bigger, thus enabling the formal verification of more complex computer systems. As a result, the formal verification of hardware and software has become a promising area for research and industrial applications. Constraints have applications to all formal verification methods. Particularly, the efficient use of constraints can make or break a formal verification run, and can result in orders of magnitude speedup and orders of magnitude increase in scalability for solving of larger problems.

The main goal of the Constraints in Formal Verification workshop is to bring together researchers from the CSP/SAT/SMT and the formal verification communities, to describe new applications of constraint technology to formal verification, to disseminate new challenging problem instances, and to propose new dedicated algorithms for hard formal verification problems. This workshop will be of interest to researchers from both academia and industry, working on constraints or on formal verification and interested in the application of constraints to formal verification.


Scope:
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The scope of the workshop includes topics related to the application of constraint technology to formal verification, namely:
   * application of constraint solvers to hardware verification;
   * application of constraint solvers to software verification;
   * dedicated solvers for formal verification problems;
   * challenging formal verification problems.


Location:
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The workshop will take place in the Doubletree Hotel in Austin Texas, on November 5, 2015. It will be structured to allow ample time for discussion and demonstration of new tools and new problem instances.


Registration:
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http://iccad.com/registration-rates
Just $175 registration for IEEE or ACM members ($150 for students)!


Invited Speakers:
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Santosh Nagarakatte, Rutgers University, New Brunswick, U.S.A.
Talk title: Lightweight Formal Methods for LLVM Verification

Corina Pasareanu, Carnegie Mellon/NASA Ames Research Center, U.S.A.
Talk title: On the Probabilistic Analysis of Software


Full Program:
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https://iccad.com/sites/2013.iccad.com/files/files/CFV15_program.pdf


General Chair:
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Miroslav Velev, Aries Design Automation, U.S.A.
Email: mvelev at gmail.com


Program Chair:
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Alex Groce, Oregon State University, U.S.A.
Email: agroce at gmail.com


Publicity Chair:
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Kristin Yvonne Rozier, University of Cincinnati, U.S.A.
Email: rozierky at uc.edu


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         /    \                     /_/      __
        /  __  \                             \ \_____
        | (  ) |                          ###[==_____>
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      / | |  | | \
     /  |=|==|=|  \       Kristin Yvonne Rozier, Ph.D.
   /    | |  | |    \       Assistant Professor
  / USA | ~||~ |NASA \    University of Cincinnati
 |______|  ~~  |______|     Departments of Aerospace Engineering
        (__||__)              and Computer Science
        /_\  /_\            Phone: (513) 556-3544
        !!!  !!!          http://temporallogic.org/kyr

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