[TYPES/announce] FMCAD 2016: 2nd CALL FOR PAPERS

Igor Konnov konnov at forsyte.tuwien.ac.at
Fri Apr 29 12:26:43 EDT 2016


International Conference on
Formal Methods in Computer-Aided Design (FMCAD)
Mountain View, CA, USA, October 3-6, 2016



Abstract Submission:            May 02, 2016
Paper Submission:               May 09, 2016
Author Response Period:         June 17-21, 2016
Author Notification:            July 09, 2016
Camera-Ready Version:           Aug 09, 2016

All deadlines are 11:59 pm AoE (Anytime on Earth)

FMCAD Tutorial Day:            October 3, 2016
FMCAD Regular Program:         October 4-6, 2016


FMCAD 2016 is the sixteenth in a series of conferences on the theory
and applications of formal methods in hardware and system
verification. FMCAD provides a leading forum to researchers in
academia and industry for presenting and discussing groundbreaking
methods, technologies, theoretical results, and tools for reasoning
formally about computing systems. FMCAD covers formal aspects of
computer-aided system design including verification, specification,
synthesis, and testing.

FMCAD employs a rigorous peer-review process. Accepted papers are
distributed through both ACM and IEEE digital libraries. In addition,
published articles are made available freely on the conference page;
the authors retain the copyright. There are no publication fees. At
least one of the authors is required to register for the conference
and present the accepted paper. A small number of outstanding FMCAD
submissions will be considered for inclusion in a Special Issue of the
journal on Formal Methods in System Design (FMSD).


FMCAD welcomes submission of papers reporting original research on
advances in all aspects of formal methods technology and its
application to computer-aided design. Topics of interest include (but
are not limited to):

-- Model checking, theorem proving, equivalence checking, abstraction
    and reduction, compositional methods, decision procedures at the bit-
    and word-level, probabilistic methods, combinations of deductive
    methods and decision procedures.

-- Synthesis and compilation for computer system descriptions,
    modeling, specification, and implementation languages, formal
    semantics of languages and their subsets, model-based design, design
    derivation and transformation, correct-by-construction methods.

-- Application of formal and semi-formal methods to functional and
    non-functional specification and validation of hardware and software,
    including timing and power modeling, verification of computing
    systems on all levels of abstraction, system-level design and
    verification for embedded and cyberphysical systems, hardware-
    software co-design and verification, transaction-level verification.

-- Experience with the application of formal and semi-formal methods
    to industrial-scale designs; tools that represent formal verification
    enablement, new features, or a substantial improvement in the
    automation of formal methods.

-- Application of formal methods in areas beyond computer systems,
    including formal methods describing processes studied in other areas
    of science, engineering, and humanities.

-- (New) Application of formal methods to verifying safety,
    connectivity and security properties of networks and distributed


Submissions must be made electronically in PDF format via EasyChair, at


Two categories of papers are invited: Regular papers, and Tool & Case
Study papers. Regular papers are expected to offer novel foundational
ideas, theoretical results, or algorithmic improvements to existing
methods etc, along with experimental impact validation where
applicable. Tool & Case Study papers are expected to report on the
design, implementation or use of verification (or related) technology
in a practically relevant context (which need not be industrial), and
its impact on design processes.

Both Regular and Tool & Case study papers must use the IEEE
Transactions format on letter-size paper with a 10-point font size.
Regular papers can be up to 8 pages in length and tool papers up to 4
pages, although there is no requirement to fill all pages in either
category. Authors will be required to select the appropriate paper
category at abstract submission time. Submissions may contain an
optional appendix, which will not appear in the final version of the
paper. The reviewers should be able to assess the quality and the
relevance of the results in the paper without reading the appendix.

Submissions in both categories must contain original research that has
not been previously published, nor is concurrently submitted for
publication.  Any partial overlap with published or concurrently
submitted papers must be clearly indicated. If experimental results
are reported, authors are strongly encouraged to provide adequate
access to their data, at submission time, so that results can be
independently verified.


Program Committee:

Pranav Ashar                 Real Intent
Domagoj Babic                Google
Armin Biere                  Johannes Kepler University Linz
Roderick Bloem               Graz University of Technology
Ahmed Bouajjani              University of Paris
Gianpiero Cabodi             Politecnico di Torino
Leonardo de Moura            Microsoft Research
Michael Emmi                 IMDEA Software Institute
Malay Ganai                  Synopsys
Arie Gurfinkel               SEI, Carnegie Mellon University
Ziyad Hanna                  Cadence Design System
Fei He                       Tsinghua University
Keijo Heljanko               Aalto University
Warren Hunt                  University of Texas Austin
Himanshu Jain                Synopsys
Gerwin Klein                 NICTA and UNSW
Shuvendu Lahiri              Microsoft Research
Rebekah Leslie-Hurd          Intel
Panagiotis Manolios          Northeastern University
Kenneth McMillan             Microsoft Research
John O'Leary                 Intel
Lee Pike                     Galois, Inc.
Ruzica Piskac                Yale University (co-chair)
Ahmed Rezine                 Linköping University
Sean Safarpour               Synopsys
Divjyot Sethi                CISCO
Natasha Sharygina            University of Lugano
Sharon Shoham                Tel Aviv
Muralidhar Talupur           FormalSim Inc (co-chair)
Michael Tautschnig           Queen Mary University of London
Shobha Vasudevan             University of Illinois at Urbana-Champaign
Helmut Veith                 Technische Universität Wien (co-chair)
Tomas Vojnar                 Brno University of Technology
Chao Wang                    Virginia Tech
Eran Yahav                   Technion
Florian Zuleger              Technische Universität Wien

Program chairs:

Ruzica Piskac, Yale University
Muralidhar Talupur, FormalSim Inc
Helmut Veith, Technische Universität Wien

Publication Chair:

Florian Zuleger, Technische Universität Wien

Local Arrangements Chair & Webmaster:

Sean Safarpour, Synopsys
Divjyot Sethi, CISCO
Jens Katelaan, TU Wien


Armin Biere, Johannes Kepler University in Linz, Austria
Alan Hu, University of British Columbia, Canada
Warren Hunt, University of Texas at Austin, USA
Vigyan Singhal, Oski Tech

More information about the Types-announce mailing list