[TYPES/announce] Preliminary Call for Papers: HLDVT’16

Miroslav Velev mvelev at gmail.com
Thu Jun 16 18:04:41 EDT 2016

*18th International High-Level Design, Validation, and Test Workshop

Silicon Valley, California, U.S.A., October 7 – 8, 2016


Abstracts due: July 17, 2016

Full papers due: July 31, 2016

Author notification: August 15, 2016

Final manuscripts due: August 31, 2016

The 18th HLDVT workshop aims to bring together a community of researchers
in the areas of design, validation, and test of hardware, software,
cyber-physical systems, biological systems, and biochips. The workshop
addresses the integration of multiple functions on-chip/in-system at higher
levels of design abstraction, and the techniques and methodologies for
modeling, analyzing, and validating such systems. In particular, the
workshop has become a unique forum for researchers and practitioners to
discuss the practical issues associated with validation of extremely large

Topics of interest include, but are not limited to:

- Simulation-Based Validation

- Formal Verification, and Hybrid Methods

- Design Abstraction, and Behavioral Modeling

- Error Trace Interpretation, and Debugging

- Functional Safety/Safety-critical System Verification

- On-Chip, and Core-Based Testing

- Test Generation for Defects, Design Errors, and Delay Faults

- Hardware/Software, and Mixed-signal System Co-Validation

- Emulation, and Prototyping

- Post-silicon Validation, and Debug.

Paper Submission: The Program Committee invites authors to submit papers
not to exceed 8 pages (in the IEEE two-column conference format with 10-pt
font size), describing original and unpublished work. Panels and special
session proposals are also invited. All submissions must be made
electronically in PDF format, using the paper submission web site:

Paper Publication and Presenter Registration: The submission of a paper or
panel proposal will be considered as evidence that upon acceptance, the
author(s) will present their work. For the papers to appear in the program
and proceedings, at least one full workshop registration by an author is
required before the submission of the camera-ready version. IEEE reserves
the right to exclude a paper from distribution (e.g., removal from IEEE
Xplore) if the paper is not presented at the workshop.

*Organizing Committee*

General Chair

Prab Varma (Real Intent, U.S.A.)

Program Chair

Miroslav Velev (Aries Design Automation, U.S.A.)

Past Chair

Samar Abdi (Concordia University, Canada)

Special Sessions Chair

Franco Fummi (University of Verona, Italy)

Finance Chair

Vinod Viswanath (Real Intent, U.S.A.)

Tutorials Chair

Zeljko Zilic (McGill University, Canada)

Publications Chair

Sara Vinco (Politecnico di Torino, Italy)

Publicity Chair

Robert Wille (Johannes Kepler University Linz, Austria)

*Program Committee*

Jens Brandt (Hochschule Niederrhein, Germany)

Rolf Drechsler (University of Bremen, Germany)

Franco Fummi (University of Verona, Italy)

Priyank Kalla (University of Utah, U.S.A.)

Natasa Miskov-Zivanov (Carnegie Mellon University, U.S.A.)

Mohammad Mousavi (Halmstad University, Sweden)

Nicola Nicolici (McMaster University, Canada)

Corina Pasareanu (NASA and Carnegie Mellon University, U.S.A.)

Hiren Patel (University of Waterloo, Canada)

Priyadarsan Patra (Intel, U.S.A.)

Sandeep Shukla (Indian Institute of Technology Kanpur, India)

Jean-Pierre Talpin (INRIA, France)

Sara Vinco (Politecnico di Torino, Italy)

Robert Wille (Johannes Kepler University Linz, Austria)

Zeljko Zilic (McGill University, Canada)

*Steering Committee*

Bernard Courtois (CMP-TIMA, France)

Masahiro Fujita (University of Tokyo, Japan)

Prab Varma (Real Intent, U.S.A.)
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