[TYPES/announce] ASPLOS 2011 Call for Participation

[Soner Onder]

*** Our apologies if you receive this announcement from multiple sources ***

===========================================================================================
Call for Participation : ASPLOS 2011 ( http://asplos11.cs.ucr.edu )

Sixteenth International Conference on Architectural Support for
Programming Languages and Operating Systems Newport Beach, California, 
March 5-11, 2011
===========================================================================================


Registration is open. Early registration for the conference and hotel 
reservations
is Februrary 2.


A preliminary version of the program can be found at the address
http://asplos11.cs.ucr.edu/tentative.html and a text version is also 
included in this message.


ASPLOS is sponsored by ACM SIGPLAN, ACM SIGARCH and ACM SIGOPS and
has also been generously supported by National Science Foundation,
VMWare, Google, Intel, HP, Qualcomm Research Center, Oracle, AMD, 
Microsoft Research,
and IBM.
============================================================================================


=========================
ASPLOS 2011 Travel Grants
=========================
Funded by: NSF, SIGARCH, SIGOPS, SIGPLAN, & Google.

ASPLOS will offer travel grants for students to attend the conference, 
in addition to reduced
student registration fees. Travel grants will also be made available to 
junior faculty members,
under-represented minorities, and faculty members from non-Ph.D. 
granting colleges. The size and
number of these grants will vary depending on funding availability and 
the number of applications
that we receive. Expenses will be reimbursed after the conference; grant 
recipients will be asked to
submit original receipts.

While we encourage all in need of a travel grant to apply, priority will 
be given to paper and
poster presenters, co-authors, and under-represented minorities 
(including women and undergraduate
students interested in research).

To apply for a travel grant from ASPLOS, please complete the following 
steps:

* Complete the application form 
(http://asplos11.cs.ucr.edu/travel_grant_application_form.doc).
* Applicants, compose an email to asplos2011travel at gmail dot com. For 
your subject line,
please use “Travel Grant Application for <Your-Last-Name, Your-First-Name>”.
* In the body of your email, please briefly describe your reasons for 
attending ASPLOS and your
research interests.
* Attach a current resume and the completed application form.

Student applicants also need to ask their advisor to send an e-mail to 
asplos2011travel at gmail dot
com with the subject line “Student Travel Status Confirmation for <Your 
Last Name, Your First
Name>”, stating that you are a full time student pursuing an MS/Ph.D. or 
undergraduate research in
the areas covered by ASPLOS.

Travel grant applications must be received by January 26th, 2011. For 
students, the confirmation
email from their advisor needs to be received by that date also. Because 
of the large number of
applications we expect to receive, we will not solicit these letters 
from your advisors - it is your
responsibility to ensure that your advisor sends the email before the 
deadline.

We will acknowledge receipt of your application within a week of 
receipt. If you do not receive such
an acknowledgement, please resend. If you still don't receive an 
acknowledge mail, please call the
Travel Chair, Philip Brisk, at +1 (951) 827-2030.

We will do our best to notify you about the status of your application 
by January 30th, which is 3
days before the conference early registration deadline. Note that award 
decisions will be made based
on funding availability. Note also that some awards may be made only 
after the conference.

Please contact Philip Brisk for information.

Funding for ASPLOS travel grants has been generously provided by the 
NSF, the SIGARCH, the SIGOPS,
and the ACM SIGPLAN Professional Activities Committee (PAC).
-------------------------------------------------------------------------------------------------- 



=================
Tentative Program
=================


Innovations in Memory Ordering Models for Parallel Machines
===========================================================

Efficient Processor Support for DRFx, a Memory Model with Exceptions
Abhayendra Singh[1], Daniel Marino[2], Satish Narayanasamy[1], Todd 
Millstein[2], Madanlal Musuvathi[3]
[1]University of Michigan, Ann Arbor, [2]University of California, Los 
Angeles, [3]Microsoft Research


RCDC: A Relaxed-Consistency Deterministic Computer
Joseph Devietti, Jacob Nelson, Tom Bergan, Luis Ceze, Dan Grossman
University of Washington


Specifying and Checking Semantic Atomicity for Multithreaded Programs
Jacob Burnim, George Necula, Koushik Sen
University of California, Berkeley


Novel Computing Platforms
=========================


A Case for Neuromorphic ISAs
Atif Hashmi, Andrew Nere, James Thomas, Mikko Lipasti
University of Wisconsin - Madison


Mementos: System Support for Long-Running Computation on RFID-Scale Devices
Benjamin Ransford, Jacob Sorber, Kevin Fu
University of Massachusetts Amherst


Pocket Cloudlets
Emmanouil Koukoumidis[1], Dimitrios Lymberopoulos[2], Karin Strauss[2], 
Jie Liu[2], Doug Burger[2]
[1]Princeton University, [2]Microsoft Research


Programming for Persistent Memory
=================================


Mnemosyne: Lightweight Persistent Memory
Haris Volos, Andres Jaan Tack, Michael Swift
University of Wisconsin-Madison


NV-Heaps: Making Persistent Objects Fast and Safe with Next-Generation, 
Non-Volatile Memories
Joel Coburn, Adrian M. Caulfield, Ameen Akel, Laura M. Grupp, Rajesh K. 
Gupta, Ranjit Jhala, Steven Swanson
University of California, San Diego


Learning from the Past: Drawing Conclusions from Extensive Measurement 
Studies
==============================================================================

Faults in Linux: Ten Years Later
Nicolas Palix[1], Suman Saha[2], Gael Thomas[2], Christophe Calves[2], 
Julia Lawall[3], Gilles Muller[4]
[1]DIKU, [2]LIP6-Regal, [3]DIKU/INRIA/LIP6-Regal, [4]INRIA/LIP6-Regal


Looking Back on the Language and Hardware Revolution: Measured Power, 
Performance, and Scaling
Hadi Esmaeilzadeh[1], Stephen Blackburn[2], Ting Cao[2], Xi Yang[2], 
Kathryn McKinley[1]
[1]The University of Texas at Austin, [2]Australian National University


Rethinking and Protecting Operating Systems
===========================================

Ensuring Operating System Kernel Integrity with OSck
Owen Hofmann, Alan Dunn, Sangman Kim, Indrajit Roy, Emmett Witchel
The University of Texas at Austin


Rethinking the Library OS from the Top Down
Donald Porter[1], Silas Boyd-Wickizer[2], Jon Howell[3], Reuben 
Olinsky[3], Galen Hunt[3]
[1]Stony Brook University, [2]Massachusetts Institute of Technology, 
[3]Microsoft Research


Recognizing Software and Concurrency Bugs
=========================================

2ndStrike: Towards Manifesting Hidden Concurrency Typestate Bugs
Qi Gao[1], Wenbin Zhang[2], Zhezhe Chen[2], Mai Zheng[2], Feng Qin[2]
[1]Facebook, Inc., [2]The Ohio State University


ConSeq: Detecting Concurrency Bugs through Sequential Errors
Wei Zhang, Junghee Lim, Ramya Olichandran, Joel Scherpelz, Guoliang Jin, 
Shan Lu, Thomas Reps
University of Wisconsin, Madison


S2E: A Platform for In Vivo Multi-Path Analysis of Software Systems
Vitaly Chipounov, Volodymyr Kuznetsov, George Candea
EPFL


Enhancing Device Driver Reliability
===================================


A declarative language approach to device configuration
Adrian Schupbach, Andrew Baumann, Timothy Roscoe, Simon Peter
ETH Zurich


Improved Device Driver Reliability Through Hardware Verification Reuse
Leonid Ryzhyk[1], John Keys[2], Balachandra Mirla[1], Arun Raghunath[2], 
Mona Vij[2], Gernot Heiser[1]
[1]NICTA & UNSW, [2]Intel


Better Logging Support for Software Debugging
=============================================

DoublePlay: Parallelizing sequential logging and replay
Kaushik Veeraraghavan, Dongyoon Lee, Benjamin Wester, Jessica Ouyang, 
Peter Chen, Jason Flinn, Satish Narayanasamy
University of Michigan


Improving Software Diagnosability via Log Enhancement
Ding Yuan[1], Jing Zheng[2], Soyeon Park[2], Yuanyuan Zhou[2], Stefan 
Savage[2]
[1]University of Illinois, Urbana-Champaign, [2]University of 
California, San Diego


Exploiting Parallelism on GPUs
==============================


On-the-Fly Elimination of Dynamic Irregularities for GPU Computing
Eddy Zhang, Yunlian Jiang, Ziyu Guo, Kai Tian, Xipeng Shen
The College of William and Mary


Sponge: Portable Stream Programming on Graphics Engines
Amir Hormati, Mehrzad Samadi, Mark Woh, Trevor Mudge, Scott Mahlke
University of Michigan


New Compiler Optimizations
==========================

Exploring circuit timing-aware languages and compilation
Giang Hoang, Robert Bruce Findler, Russ Joseph
Northwestern University


Orchestration by Approximation: Mapping Stream Programs Onto Multi-Core 
Architectures
Sardar M. Farhad[1], Yousun Ko[2], Bernd Burgstaller[2], Bernhard Scholz[1]
[1]The University of Sydney, [2]Yonsei University


Synthesizing Concurrent Schedulers for Irregular Algorithms
Donald Nguyen and Keshav Pingali
The University of Texas at Austin


Saving Power and Energy
=======================

Blink: Managing Server Clusters on Intermittent Power
Navin Sharma, Sean Barker, David Irwin, Prashant Shenoy
University of Massachusetts at Amherst


Dynamic Knobs for Power-Aware Computing
Henry Hoffman, Stelios Sidiroglou, Michael Carbin, Sasa Misailovic, 
Anant Agarwal, Martin Rinard
MIT


Flikker: Saving DRAM Refresh-power through Critical Data Partitioning
Song Liu[1], Karthik Pattabiraman[2], Thomas Moscibroda[3], Benjamin Zorn[3]
[1]Northwestern University, [2]University of British Columbia, 
[3]Microsoft Research


MemScale: Active Low-Power Modes for Main Memory
Qingyuan Deng[1], David Meisner[2], Luiz Ramos[1], Thomas Wenisch[2], 
Ricardo Bianchini[1]
[1]Rutgers University, [2]University of Michigan


Novel Performance Improvements
==============================

Improving the Performance of Trace-based Systems by False Loop Filtering
Hiroshige Hayashizaki, Peng Wu, Hiroshi Inoue, Mauricio Serrano, Toshio 
Nakatani
IBM


Inter-core Prefetching for Multicore Processors Using Migrating Helper 
Threads
Md Kamruzzaman, Steven Swanson, Dean Tullsen
UCSD


Understanding and Improving Transactional Memory
================================================

Hardware Acceleration of Transactional Memory on Commodity Systems
Jared Casper, Tayo Oguntebi, Sungpack Hong, Nathan Bronson, Christos 
Kozyrakis, Kunle Olukotun
Stanford University


Hybrid NOrec: A Case Study in the Effectiveness of Best Effort Hardware 
Transactional Memory
Luke Dalessandro[1], Fraincois Carouge[2], Sean White[2], Yossi Lev[3], 
Mark Moir[3], Michael Scott[1], Michael Spear[2]
[1]University of Rochester, [2]Lehigh University, [3]Sun Labs at Oracle